1. Field of the Invention
The present invention relates to a method of manufacturing semiconductor devices, and particularly to a manufacturing method of semiconductor devices called CSPs (Chip Size Packages).
2. Description of the Related Art
In these years, electronic devices such as mobile phones, mobile computers, personal digital assistants (PDAs), home video cameras, and digital cameras, and the peripheral components of the electronic devices are being dramatically reduced in size and weight. In association with this market trend, demands for reduction in size, thickness, and weight and high density mounting onto fine wiring boards of semiconductor chips to be used in electronic devices are increasing. In order to meet these demands, the development of semiconductor devices of package sizes the same as or slightly larger than the chip sizes, so-called CSPs (Chip Size Packages), is attracting attention.
Other than being ultra-small and thin to be close to the chip size, an advantage of the CSPs is that the conventionally known surface mounting technology can be used in mounting them on printed boards. Another advantage of the CSPs is that because a semiconductor chip in a package structure is mounted, mounting of high quality can be ensured as compared with bare chip mounting where a semiconductor chip is directly mounted on a printed board.
In the manufacturing method of semiconductor devices called CSPs, an insulating film and a protective film are formed over a semiconductor wafer on which integrated circuits and connection pads electrically connected to the integrated circuits are formed. Subsequently, portions of the insulating film and the protective film on the connection pads are removed, and redistribution lines (also, referred to as sub-lines or sub-wirings) electrically connected via the connection pads to the integrated circuits are formed. Then, a resist layer having openings is formed, and column-shape protruding electrodes (hereinafter called post bumps) electrically connected to the redistribution lines are formed inside the openings. Further, the resist layer is removed, and the post bumps are covered with a sealing layer made of resin, thereby finishing the production of wafer-level CSPs.
A material in liquid form can be used for the above-mentioned resist layer, but it is very difficult to coat a resist liquid. Accordingly, a dry film structured to have a resin to be solidified by light sandwiched between a polyethylene film and a polyester film is usually used as the resist layer of a large thickness for forming the post bumps.
In order to meet a demand for further reduction in size and thickness, it is becoming essential to make the redistribution line finer. However, as the redistribution line becomes finer, the surface state before the dry film is attached (that is, projections and depressions due to the redistribution lines) becomes less negligible, and thus it becomes more difficult to stick the dry film to be flat. If the dry film fails to be stuck to be flat, wrinkles will occur in the dry film, and thus spaces will be formed between the dry film and the redistribution lines and between the dry film and the protective film. Where such spaces are formed, the problem will occur that plating grows in the spaces as well when a metal plating process is performed to form post bumps, resulting in a short between the redistribution lines.
Further, in the above-described CSPs, the problem may occur that metal ions from the redistribution lines diffuse into the sealing layer (that is, electromigration occurs) because the redistribution lines are covered with the sealing layer of resin, resulting in a short between the redistribution lines.
Japanese Patent Application Laid-Open Publication No. 2008-84919 (Reference 1) discloses a technique which coats liquid resin over redistribution lines by spin coating or the like to form a coating film and coats a dry film over the coating layer to form post bumps. Further, Japanese Patent Application Laid-Open Publication No. 2008-244383 (Reference 2) discloses a technique which forms an anti-electromigration film after forming post bumps.